Noise processing system for a television receiver

ABSTRACT

A noise processing system is described for use in protecting a television receiver&#39;s sync processing path and its video processing path from impulse noise. To protect the video processing path, a first noise canceller receives a composite video signal, detects each noise pulse therein which exceeds a video noise threshold, and replaces each such noise pulse with a selected voltage level. The resultant noise processed video may then be applied to the receiver&#39;s video processing path. To protect the sync processing path, another noise canceller receives the composite video signal, detects noise pulses therein which exceed a sync noise threshold, generates a detection pulse for each such noise pulse, and combines the detection pulses with composite video so as to cancel the noise pulses. Thus, another noise processed video signal is developed for application to the receiver&#39;s sync processing path.

BACKGROUND OF THE INVENTION

This invention is generally directed to improvements in televisionreceivers. It is specifically directed to an improved noise processingsystem for use in such a receiver.

Television receivers typically include a video detector for developing acomposite video signal which includes video information and syncinformation. The former information is coupled to a video processingpath which amplifies and otherwise pre-conditions the video informationfor input to a cathode ray tube. The sync information is extracted fromthe composite video signal by coupling the detector's output to a syncprocessing path which normally includes a sync separator. The latterdevice develops horizontal and vertical sync output pulses from thecomposite video signal.

In the case where impulse noise is present in the detector's output,that noise may be coupled into the video processing path and result in anoisy image being developed on the screen of the cathode ray tube. Theimpulse noise will also be coupled into the sync processing path andcause the sync separator to generate unwanted outputs. Because theoutput of the sync separator is usually coupled to an AGC (automaticgain control) system in the receiver, the latter system may be disruptedby the noise-induced output of the sync separator.

To avoid AGC disruption by impulse noise, many receivers include someform of noise protection, as shown in U.S. Pat. No. 3,806,646, forexample. Although prior noise protection circuits have provided improvedAGC performance under noisy conditions, even better protection isdesired, particularly for receivers which use envelope detectors. Suchdetectors tend to rectify white-going noise impulses and develop higherenergy black-going noise impulses. The latter impulses have aparticularly deleterious effect on the receiver's AGC system and syncseparator, causing the displayed television image to suffer from broadarea brightness fluctuations, small area brightness and colordistortions, and horizontal and vertical jitter.

Accordingly, it is a general object of the invention to provide animproved noise processing system for a television receiver.

It is a more specific object of the invention to provide a noiseprocessing system which protects the receiver's video processing path aswell as its sync processing path from impulse noise.

It is another object of the invention to provide such a noise processingsystem which gives a high level of noise protection to the sync andvideo processing paths in the presence of high energy, black-going noiseimpulses of the type output by envelope detectors.

BRIEF DESCRIPTION OF THE DRAWINGS

The objects stated above and other objects of the invention are setforth more particularly in the following detailed description and in theaccompanying drawings, of which:

FIG. 1 is a block diagram of the noise processing system according tothe invention;

FIG. 2 illustrates a portion of a composite video signal having impulsenoise, which signal is illustrative of the output of the detector shownin FIG. 1;

FIG. 3 depicts the output of one of the impulse detectors of FIG. 1;

FIG. 4 depicts the output of the other impulse detector shown in FIG. 1;

FIG. 5 shows the output of the video clipper of FIG. 1;

FIG. 6 depicts an integrated composite video signal developed by theintegrator and inverter of FIG. 1;

FIG. 7 illustrates the output of the miller integrator and inverterwhich is applied to the sync separator of FIG. 1; and

FIGS. 8 and 9 constitute a detailed circuit diagram of a preferredembodiment of the noise processing system shown in FIG. 1.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring now to FIG. 1, a noise processing system is shown for reducingthe effect of impulse noise on a television receiver's sync processingpath as well as on its video processing path. The receiver typicallyincludes a tuner and IF stage 10 for receiving and amplifying anincoming television signal. The output of the stage 10 is typicallycoupled to the input of a detector 12 for demodulating the receivedtelevision signal. The output of the detector 12 is a composite videosignal which includes sync components and video components at the node14.

The composite signal present at the node 14 will sometimes include noiseimpulses which are both white-going and black-going in the case wherethe detector 12 is a synchronous type detector. In the case where anenvelope detector is used, the impulse noise at the node 14 will largelybe black-going noise, i.e., noise impulses which extend toward andbeyond sync tips.

Referring briefly to FIG. 2, an illustrative waveform of a portion of acomposite signal is shown of the type which is developed at node 14under noisy signal conditions. The illustrated waveform is shown ashaving a white level, a gray level, and a blank level. Extendingdownwardly from the blank level is a sync tip on which a pair of noiseimpulses 16 and 18 are superimposed. In the illustrated waveform, thenoise pulses 16 and 18 are of the black-going type which are typicallygenerated by an envelope detector. It is this type of noise pulse whichthe present system substantially removes in order to prevent disruptionof the receiver's AGC system, to minimize disturbance of the horizontaland vertical deflection system via the sync separator output, and toimprove the quality of the video image which the receiver develops fromthe composite video signal.

Referring again to FIG. 1, that portion of the noise processing systemwhich protects the receiver's sync processing path from impulse noiseincludes an impulse detector 20, an impulse reversing circuit 22, avideo clipper 24 and an integrator and inverter 26. The latter fourdevices operate to remove the noise pulses 16 and 18 (FIG. 2) from thecomposite signal present at node 14, so that the output of theintegrator and inverter 26 constitutes a video signal from which noisepulses have been removed.

To protect the receiver's video processing path from impulse noise, theillustrated system includes another impulse detector 28 and a pair ofvideo switches 30 and 32. The latter three devices generally operate tosense the noise pulses present at the node 14 and to insert into thevideo signal a selected voltage level in place of the noise pulses so asto develop at output lead 34 a noise processed video signal in whichnoise pulses have been replaced with a voltage level which is selectedto minimize distortion in the video image which is developed from thesignal on the lead 34. The way in which noise pulses are removed fromthe video signal for protection of the video processing path isdescribed immediately below. Thereafter, the noise processing whichprotects the sync processing path will be described in greater detail.

Referring first to the impulse detector 28, this device receives thecomposite video signal from the node 14 and also a reference voltageindicated as 3.8 volts. The detector 28 senses noise pulses which extendbeyond, that is, more negative than, 3.8 volts and generates a controlsignal upon the occurrence of each such detection. Referring again toFIG. 2, the 3.8 volt reference which is applied to the impulse detectorcorresponds to the video noise threshold shown in FIG. 2. In the presentembodiment, a video noise threshold of 3.8 volts is selected for thecase in which the composite video signal at node 14 has a white level ofabout 7 volts and a sync tip level of about 4 volts. Those white andsync tip levels may, of course, have other values. Nevertheless, thevideo noise threshold is consistently selected to be at or somewhatbelow the sync tip level as shown in FIG. 2.

Whenever the noise pulses at the node 14 extend lower than the videonoise threshold, the impulse detector 28 generates a control signalwhich may be in the form of a control pulse. For example, FIG. 3 shows acontrol pulse 16a which is generated by the impulse detector 28 inresponse to the pulse 16 extending beyond the video noise threshold.Likewise, another control pulse 18a is developed in response to thenoise pulse 18. As shown, additional control pulses are developed inresponse to each noise pulse which extends beyond the video noisethreshold. These control pulses are coupled via a lead 36 (FIG. 1) tothe video switch 32 to activate the latter device in response to eachcontrol pulse.

The video switch 32 also receives the composite video signal via aninput lead 38. In response to each control pulse on the lead 36, theswitch 32 operates to delete a time coincident noise pulse received onthe lead 38 and to replace the deleted noise pulse with a voltage levelselected to minimize disruption of the video image.

The voltage level which the switch 32 uses as a replacement for noisepulses is derived from the video switch 30. The switch 30 receives agray level voltage at an input lead 40, a blank level voltage at aninput lead 42, and a horizontal strobe at another input lead 44. Duringthe active scan time of the receiver, the switch 30 preferably operatesto couple the gray level signal on lead 40 to the video switch 32 sothat, whenever a control pulse is present on the lead 36, the switch 32replaces noise pulses in the lead 38 with a gray level signal receivedfrom the video switch 30.

Referring again to FIG. 2, the gray level signal is selected to be morenegative than the video signal's white level and more positive than itsblank level. Preferably, the gray level signal is selected to beapproximately 30 IRE units.

As stated previously, it is preferred that the gray level signal beinserted into the video signal only during the receiver's active scantime. For example, FIG. 2 illustrates a noise pulse 46 which occursduring the receiver's active scan time. When this noise pulse occurs,the impulse detector 28 develops a control pulse 46a which causes thevideo switch 32 to delete the noise pulse 46 from its received videosignal and to substitute in its place the gray level signal receivedfrom the video switch 30. During the receiver's blanking interval, it ispreferred not to insert the gray level signal because DC restorationcircuitry (not shown) in the receiver normally senses the blank levelfor restoring the video signal to a selected DC level. Thus, it ispreferred that the noise pulses 16 and 18 which occur during theblanking interval not be replaced by a gray level signal. In the presentembodiment, the noise pulses 16 and 18 are removed by the video switch32 and replaced by a blank level signal so as not to upset the DCrestoration circuitry.

Referring again to FIG. 1, the horizontal strobe which is received bythe video switch 30 via the lead 44 may be derived from the receiver'sflyback pulse so as to inform the switch 30 that the receiver is in theblanking interval. When the horizontal strobe is received, the switch 30outputs to the switch 32 the blank level signal received via the lead 42rather than the gray level signal received on the lead 40. Hence, theswitch 32 replaces impulse noises with a blank level signal whenever thereceiver is in the blanking interval. Thus, the signal on the lead 34constitutes a video signal from which noise pulses have been removed andreplaced, during the blanking interval, by a blank level signal and,during the receiver's active scan time, by a gray level signal.

Returning now to a discussion of that portion of the noise processingsystem which protects the sync processing path from impulse noise, theimpulse detector 20 senses impulse noise which extends beyond the videothreshold level and beyond a second threshold level which exceeds thevideo threshold level. As shown in FIG. 1, a sync noise threshold isestablished by inputting to the detector 20 a 2.2 volt DC referencesignal which corresponds to the sync noise threshold shown in FIG. 2.

In response to each noise pulse which extends beyond the sync noisethreshold (2.2 volts), the detector 20 generates a detection pulse forapplication to the impulse reversing circuit 22. For example, FIG. 4illustrates a detection pulse 16b which the impulse detector 20generates in response to the noise pulse 16. As shown, the detector 20generates similar detection pulses for every other noise pulse whichextends below the sync noise threshold.

Referring again to FIG. 1, the detection pulses generated by the impulsedetector 20 are coupled to the impulse reversing circuit 22. The lattercircuit is a non-saturating, fast operating circuit which reverses thepolarity of each of the pulses received from the detector 20 and appliesthose inverted pulses to the integrator and inverter 26.

The video clipper 24 receives the composite video signal from node 14and operates to clip off all noise pulses which extend just below thesync tip level. FIG. 5 illustrates the output of the video clipper,indicating that each of the noise pulses shown in FIG. 2 have beenclipped off at a level just below the sync tip level.

The clipped video signal from the video clipper 24 is applied via a lead25 to the input of the integrator and inverter 26. One function of thelatter device is to integrate and invert the signal received from thevideo clipper 24 to insure that clipped noise pulses received as part ofthe signal from the clipper 24 are time coincident with correspondingdetection pulses received from the impulse reversing circuit 22. FIG. 6illustrates the video signal which has been integrated and inverted bythe device 26.

Another function of the device 26 is to combine the clipped video signalwith the detection pulses so as to cancel the clipped noise pulseswherever they occur in the video signal. FIG. 7 illustrates the videosignal which appears at the output of the device 26 (lead 48). As shown,each detection pulse causes a noise cancelling effect in the signal atthe lead 48, thereby generating a noise processed video signal which maybe applied to the receiver's sync processing path without disrupting thenormal sync separation and AGC functions usually associated with such apath.

The first illustrated element in the sync processing path is a syncseparator 50. As shown, the separator 50 includes a transistor 51 whichreceives the noise processed video information at its base via the lead48 and which includes a resistance-capacitance network 52 in its emittercircuit. The network 52 is conventional and is employed to permit thetransistor 51 to efficiently develop horizontal and vertical sync pulsesat its output lead 54. The latter lead is conventionally coupled tohorizontal and vertical timing circuits (not shown) for use insynchronizing the receiver's vertical and horizontal scan rates with theincoming television signal. Because large amplitude noise pulses areremoved from the input to the sync separator, its output is alsosubstantially free of noise-induced pulses. Consequently, the circuitrywhich receives the output of the sync separator operates more reliablyunder noisy signal conditions.

In the special case of severe and prolonged impulse noise conditions,the input to the sync separator may be held low for a prolonged periodof time. Consequently, the sync separator may not develop an output fora prolonged period of time, but AGC action must be restored to prevent alockout situation. This is the function of an anti-lockout circuit 70which is described later.

Under noise conditions which exist for relatively short periods of time,the absence of an output from the sync separator is beneficial becausethe receiver's AGC holds the amplitude of the video signal to itspreviously established level and normal operation is reached in anon-disruptive way.

The sync pulses at the lead 54 are also coupled via another lead 56 toone input of an OR gate 58, the output of which is coupled to one inputof an AND gate 60. The other input gate 60 is a horizontal strobe sothat the gate 60 develops an output pulse each time it receives ahorizontal strobe in time coincidence with a sync output pulse from thesync separator 50.

An AGC comparator 62 receives the pulse outputs from the gate 60, thecomposite video signal from the node 14, and a four volt referencevoltage. Each time the gate 60 develops an output pulse, the comparator62 compares the sync tip levels in the composite video signal with thefour volt reference voltage and develops an output at lead 64 indicativeof any difference between the four volt reference level and the sync tiplevel.

An AGC filter 66 receives the signal on the lead 64 for storing avoltage indicative of the difference between the sync tip levels and thefour volt reference applied to the AGC comparator 62. The voltage storedin the filter 66 is applied to tuner and IF (intermediate frequency) AGCcontrols 68. These controls respond to the AGC voltage received from thefilter 66 for coupling further AGC signals to the receiver's tuner andto its IF amplifier to control the gain of both the tuner and the IFamplifier so that sync tip levels output from the detector 12 aremaintained at the four volt reference level.

Referring again to the AGC comparator 62, it will be understood that thecomparator cannot function properly if the sync separator 50 does notdevelop output pulses at the lead 56. Thus, when a composite videosignal is not present at the node 14 for some interval, the syncseparator 50 will develop no output pulse and the AGC comparator 62 willtemporarily cease to function properly. The same effect occurs when thecomposite video signal at node 14 rises to a very large level. Toovercome this so-called lockout problem, it is conventional to sense thevoltage on the capacitors in the network 52 to determine if such alockout condition has arisen. Normally, the capacitors in the network 52will discharge when the transistor 51 has not developed output pulsesfor a predetermined interval. In the illustrated arrangement, theanti-lockout network 70 is coupled to the emitter of the transistor 51for sensing when the voltage on the capacitors in the network 52 dropsto a predetermined low level. A reference voltage is also coupled to thenetwork 70 via a lead 72 so that when the voltage on the capacitors innetwork 52 falls below the reference voltage on the lead 72, the network70 develops an output which is coupled to the OR gate 58 via a lead 74for actuating the AND gate 60 when the next horizontal strobe isreceived. In this manner, the AGC comparator is actuated in order tomodify the AGC voltage in the filter 66, thereby to adjust the gain ofthe tuner and/or the IF amplifier so that a composite video signal isdeveloped at node 14 of the proper amplitude.

Referring now to FIGS. 8 and 9, a detail circuit diagram is shown of thenoise processing system of FIG. 1 and various conventional componentsshown in FIG. 1, such as the anti-lockout circuit 70. In these Figures,dashed lines enclose circuit components which perform the functions ofthe elements shown in FIG. 1. However, some of the circuit components inFIGS. 8 and 9 have dual or overlapping functions, wherefore, thecorrespondence between the functional blocks of FIG. 1 and the dashedline blocks of FIG. 8 is not exact.

To illustrate the interconnections between FIGS. 8 and 9, FIG. 8includes three output leads indicated as A, B and C, which are inputs toleads A', B' and C', respectively, of FIG. 9.

Referring first to the impulse detector 20 shown in FIG. 8, thatdetector includes transistors 76 and 77 and a diode 78. The base of thetransistor 76 receives a composite video signal from the detector 12 ofFIG. 1 and couples the video signal through the diode 78 to the lead 25,the latter of which corresponds to the output of the video clipper 24 ofFIG. 1. When the video signal at the emitter of transistor 76 includesno noise pulses which extend below the sync noise threshold, thetransistor 77 is held off by a 2.2 volt bias on its base.

The functions of the video clipper 24 and the impulse detector 28 ofFIG. 1 are provided by a transistor 80 whose emitter is coupled to thelead 25. When the composite video signal includes no noise pulses whichexceed the video noise threshold, the transistor 80 remains off and thelead 25 carries an unmodified composite video signal.

Coupled to the lead 25 is the integrator and inverter 26 which includestransistors 82 and 84 and diodes 86. The transistors 82 and 84 areinterconnected as an amplifying and inverting current mirror. Hence, thecomposite video signal on lead 25 is amplified and inverted at thecollector of the transistor 84 (lead 48) such that sync tips on the lead48 now extend in a positive direction.

Integration of the video signal on the lead 48 is effected by thecapacity associated with the diodes 86, a resistor 88 which is coupledto the base of the transistor 84, the collector to base capacity of thetransistor 84, and the amplification associated with that transistor.The amplified, inverted and integrated video signal on the lead 48 iscoupled to the sync separator 50 and, via the lead A, to theanti-lockout circuit 70 (FIG. 9).

Assuming now that the input at the base of the transistor 76 includes anoise pulse which extends below the video noise threshold (3.8 volts),that noise pulse will cause the diode 78 to turn off and the transistor80 to turn on because its base receives a bias of 3.2 volts. Hence, thetransistor 80 clamps the lead 25 so that the noise pulse present thereoncan extend no lower than the video noise threshold, as shown in FIG. 5.Consequently, the integrator and inverter 26 develops at its lead 48 awaveform such as that shown in FIG. 6 when the noise pulses are clippedby the transistor 80.

To sense the presence of the noise pulse which extended below the syncnoise threshold, the transistor 77 receives a voltage of 2.2 volts atits base. When such a noise pulse occurs, the transistor 77 turns on andreceives the current which would ordinarily maintain the transistor 76in an on condition. That current is supplied by a transistor 90 which isinterconnected with another transistor 92 as a differential amplifier.Thus, when the transistor 77 turns on, all of the current supplied bythe transistor 90 is received by the transistor 77.

Coupled to the collector of the transistor 77 is a load resistor and theinput to the circuit comprised of transistors 94 and 96. When transistor77 turns on sufficiently hard, transistor 96 turns on so that itscollector (lead 98) carries a substantial amount of current. As shown,the lead 98 is coupled to the base of the transistor 84, wherefore thehigh level of current in the lead 98 causes the transistor 84 to conductharder so that its collector voltage (lead 48) drops rapidly. Thus, anoise pulse which extended below the sync noise threshold turns on thetransistor 77 in the above sequence of events in order to lower thevoltage at lead 48 and thereby cancel out the noise pulse at that point.This effect is illustrated in FIG. 7.

For high speed noise processing operation, it is undesirable that thetransistor 84 ever go into saturation. For this purpose, the collectorof the transistor 84 is coupled via the leads A and A' (FIG. 9) todiodes 100 and the emitter of the transistor 102 so as to clamp thecollector voltage of the transistor 84 to a predetermined low levelbeyond which it cannot descend.

Another factor which influences the speed with which the noiseprocessing can occur is the rate at which the voltage on the lead 98 canrecover to a nominal value from the initial high level it experiencedwhen the transistor 96 was turned on. To cause that voltage to belowered rapidly, the base of the transistor 92 is connected to the lead98 and the base of the transistor 90 receives a one volt bias. Thus,when the current in the lead 98 causes the voltage thereon to exceed onevolt, the transistor 92 conducts heavily and the conduction of thetransistor 90 is substantially reduced. Consequently, the conduction oftransistor 77 is correspondingly reduced. The resultant increase involtage at the collector of transistor 77 turns the transistor 94 onharder but reduces the conduction in the transistor 96. Hence, thecurrent in the lead 98 is reduced as is the voltage thereon. Thisfeedback effect maintains the voltage on the lead 98 at a level of aboutone volt to permit a fast recovery to normal sync separator operationwhen a noise pulse terminates. The return to normal operation isrestored when the noise pulse moves back more positive than 2.2 voltsand transistor 77 turns off. Power is saved because of the reduction incurrent conducted by the transistor 96.

An important aspect of the operation of the noise processing effected bycircuit 22 and of the sync separator stage 50 is accomplished by theNPN-PNP configuration of transistors 94 and 96 along with theirassociated resistors. A duplicate configuration using the transistors108 and 110 is found in sync separator stage 50. The behavioraldescription will be given for the configuration of circuit 22, but thisdescription will also apply to the configuration of transistors 108 and110.

The illustrated configuration of transistors 94 and 96 allows for anoffset in the turn on, along with high speed turn on and turn off oftransistor 96. The input capacitance of the base of transistor 96 isused to advantage in its turning on and turning off as described below.

Assuming that the voltage on lead 99 is 12 volts, the base of transistor94 is at 12 volts and the emitter of transistor 94 is at approximately11.3 volts. Transistor 94 is then conducting with an emitter currentspecified by its emitter resistor. The collector current of transistor94, which is approximately equal to its emitter current, causesapproximately a 0.3 volt drop across the resistor connected to node 101.This brings the emitter voltage of transistor 96 to approximately 11.7volts. The emitter to base voltage drop of transistor 96 is held toapproximately 0.4 volts. This voltage drop keeps transistor 96 out ofconduction. Any combination of emitter voltage increase or base voltagedecrease that amounts to approximately a 0.7 volt drop will bringtransistor 96 into conduction.

Consider first a slow decrease in voltage on lead 99. When this voltagedecreases to approximately 11.7 volts, the emitter of transistor 94 willdecrease to approximately 11 volts, and the base of transistor 96 willalso be at approximately 11 volts. Because the emitter voltage oftransistor 94 has changed only slightly, there is still about 11.7 voltsat node 101 due to its collector current. The voltage drop between node101 and the base of transistor 96 is now approximately 0.7 volts,wherefore transistor 96 begins to conduct. It can be seen that theoffset in input voltage of about 0.3 volts is needed to cause transistor96 to conduct. With a further slow decrease in input voltage at lead 99,transistor 96 will conduct more heavily. Slowly increasing the voltageon the lead 99 will take transistor 96 out of conduction in the reversemanner. The sync separator stage 50 also makes use of this offset ordead zone.

When a faster decrease from the 12 volt level at the input lead 99occurs, a somewhat different action takes place. As the voltage on lead99 decreases, the voltage at the emitter of transistor 94 begins todecrease, bringing the base of transistor 96 down with it. The emitterof transistor 94 now sees the base input capacitance of transistor 96,and the emitter current of transistor 94 decreases rapidly in an attemptto discharge this capacitance. This rapid decrease in emitter current oftransistor 94 causes a rapid decrease in its collector current whichcauses the voltage at node 101 to increase rapidly. This increase involtage at node 101, along with the decrease in voltage on the base oftransistor 96, causes conduction of transistor 96 on or before the inputhas decreased to 11.7 volts. Further reduction in input voltage sustainsand increases the conduction of transistor 96.

A rapid cut-off of transistor 96 takes place with a fast increase in thevoltage on the input lead 99. As the base of transistor 94 rises, sodoes its emitter and the base voltage of transistor 96. Now, however,the current in the emitter of transistor 94 also increases rapidly dueto the need to charge the base capacitance of transistor 96. Thisincrease in emitter current in transistor 94 causes a large increase incollector current of transistor 94 and a large drop in voltage at node101. These rapid changes cause the emitter to base voltage of transistor96 to drop quickly to less than 0.7 volts and take that transistor outof saturation and out of conduction. This cut-off condition can occurbelow or at the offset input voltage. Further increases in input voltagewill maintain the cut-off condition.

Referring now to the sync separator 50, it includes the transistor 51whose base is coupled to lead 48 and whose emitter is coupled to theresistance-capacitance network 52. The collector of the transistor 51 iscoupled to an output network comprising a pair of diodes 104 andtransistors 108, 110 and 112. The operation of transistors 108 and 110is similar to the previously described operation of transistors 94 and96.

The diodes 104 are coupled as shown to the collector of transistor 51 toprevent that transistor from saturating when it turns on hard inresponse to a sync tip. Such conduction of transistor 51 lowers thevoltage at its collector (node 114) and causes transistor 110 to conductheavily. Thus, a positive-going sync pulse is developed at the collectorlead 116 of the transistor 110. The lead 116 is coupled to transistor112 which functions as an output buffer for coupling positive going syncpulses to the lead 54. The latter lead couples those sync pulses to thereceiver's horizontal and vertical timing circuits, and the lead 56couples the same pulses to the circuitry shown in FIG. 9 via leads C andC'.

As mentioned previously, the circuit composed of transistors 108 and 110rejects slow, low amplitude voltage changes at the input to the base oftransistor 108. Thus, video or non-sync information which mayinadvertently render the transistor 51 somewhat conductive is prohibitedfrom being transformed into a pulse output at the lead 54.

For proper high speed operation, it is also desirable that thetransistor 110 not be driven into hard saturation. The resistorconnected to the emitter of transistor 110 and to the collector oftransistor 108 limits the saturation current to a safe value.

Referring now to FIG. 9, the AGC comparator 62 is shown as includingtransistors 118 and 120 which are interconnected as a differentialamplifier. Their emitters are coupled via a lead 122 to a circuit whichincludes transistors 124, 126, 128 and 130. The collector of thetransistor 120 is coupled via a lead 132 to a current mirroring networkwhich includes transistors 134, 136 and 138. The emitter of thetransistor 138 is coupled to the collector of transistor 126 and to theAGC filter 66, the latter being shown as a capacitor 140.

To activate the comparator 62, the base of the transistor 128 mustreceive a horizontal strobe, and the base of the transistor 130 mustreceive either a sync pulse via the lead C' from the sync separator or asignal via the lead 74 from the anti-lockout network 70. The lead 74 andthe lead C' are both coupled to a node 142 which couples to the base ofthe transistor 130. This "wired OR" arrangement serves the purpose ofthe OR gate 58 shown in FIG. 1. The function of the AND gate 60 (FIG. 1)is provided in FIG. 9 by virtue of the fact that the transistor 130 andthe transistor 128 must be turned on simultaneously in order to activatethe AGC comparator 62.

Assuming now that the transistor 128 has received a horizontal strobe,it will turn on to provide a current path to the transistors 124 and126. If a sync pulse is simultaneously received via the lead C', thetransistor 130 conducts, and the transistor 124 mirrors an amplifiedcurrent to the emitters of transistors 118 and 120. The transistor 126mirrors a similar amplified current I₁ to node 144.

Assuming that the video signal which is received by the base of thetransistor 118 has a sync tip level equal to four volts, the transistors118 and 120 will conduct evenly. The resultant current in lead 132 ismirrored by the transistors 134, 136 and 138 as a current I₂ toward thenode 144. Normally, the currents I₁ and I₂ are of equal value when thetransistors 118 and 120 conduct equally. Thus, there will be no extracurrent into or out of capacitor 140 and the capacitor 140 will retainits previous voltage and level of charge. However, when the sync tipsdeviate from four volts, the current I₂ changes to cause a correspondingchange in charge on the capacitor 140, thereby developing a changing AGCvoltage for varying the gain of either the IF amplifier or the turner(or both) depending on the level of the received RF television signal.This gain change will bring the sync tip back to the 4 volt level andcause I₂ to be again equal to I₁ with a new voltage and level of chargeon capacitor 140.

Referring now to the anti-lockout circuit 70 shown in FIG. 9, thatcircuit receives an input via the lead B' for sensing the voltage on thecapacitors in network 52. As mentioned previously, the voltage on thosecapacitors decreases substantially when the sync separator has undergonean interval during which it has developed no output sync pulses. Tosense the voltage on the capacitors in network 52, the latter network iscoupled via the leads B and B' to the base of the transistor 146. Theemitter of transistor 146 is coupled to the base of another transistor148. The emitter of the latter transistor is coupled to a transistor 150which is normally conductive by virture of the bias applied to its base.That bias is developed by the current from transistor 102 which flowsthrough the resistor 152.

When the voltage on lead B' declines sufficiently, the transistor 148turns on to inject a larger than normal current into the node 142.Hence, when the next horizontal strobe is received by the transistor128, the collector current I₁ of transistor 126 increases. The currentI₂ may also vary, depending on the difference between the four voltreference received by the transistor 120 and the sync tip level receivedby the transistor 118. Thus, the AGC voltage on the capacitor 140 isvaried to alter the gain of the tuner and/or the IF amplifier.

The foregoing description has shown how the noise processing systemaffects and interfaces with the receiver's sync processing path. Toexplain that portion of the noise processing system which affects thevideo processing path, reference is again made to FIG. 8.

It will be recalled that the transistor 80 was turned on each time anoise pulse exceeded the video noise threshold. The collector current ofthis transistor is in the form of a current pulse which actuates thevideo switch 32.

The switch 32 includes transistors 154, 156, 158, 160, 162 and 164. Thetransistor 162 receives the composite video at its base and, in theabsence of impulse noise, couples the video to the transistor 164 foroutput to the video processing path.

When a noise pulse exceeds the video noise threshold, the collectorcurrent developed by the transistor 80 is amplified by a current mirrorformed by the transistors 154 and 156, thereby raising the voltage atthe emitter of transistor 158 (node 166) and turning that transistor on.

The base of transistor 158 is coupled to a voltage divider comprisingresistors 168, 170 and 172. The junction between resistors 170 and 172is coupled via another resistor 174 to the collector of a transistor176. The base of the latter transistor is coupled to a horizontal strobefor turning that transistor on during the receiver's blanking interval.When that interval occurs, the transistor 176 saturates to shunt theresistor 172 with the resistor 174, thereby lowering the voltage at thebase of transistor 158 to a level which causes a blank level voltage toappear on node 166. The transistor 160 then conducts to turn off thetransistor 162 and to cause the transistor 164 to output a blank levelvoltage to the video processing path.

When transistor 80 conducts anytime except during the receiver'sblanking interval, the transistor 158 is turned on and the transistor176 remains off. For this condition, the resistors 168, 170 and 172 areselected to develop a voltage at the base of the transistor 158 whichcauses a gray level voltage to appear at node 166. The gray levelvoltage is coupled via transistors 160 and 164 to the video output andthe transistor 162 is turned off.

The noise processing system described above has been found to providefast and reliable noise processing. Video images are improved in noisysignal conditions, and the sync processing path is highly desensitizedto large noise pulses. Even the high energy, black-going noise pulsesdeveloped by conventional envelope detectors are inhibited from severelyupsetting the receiver's AGC and synchronization systems. Of course, thepresent noise processing system is also useful in receivers employing asynchronous detector.

Although the invention has been described in terms of preferredstructure, it will be obvious to those skilled in the art that manymodifications and alterations may be made thereto without departing fromthe invention. Accordingly, all such modifications and alterations areintended to be considered as within the spirit and scope of theinvention as defined by the appended claims.

What is claimed is:
 1. In a television receiver which detects acomposite video signal having a blank level and a gray level, and whichincludes a path for processing sync information derived from thecomposite video signal and another path for processing video informationderived from the composite video signal, a noise processing system forreducing impulse noise in the sync processing path and in the videoprocessing path, comprising:a first impulse detector receiving thecomposite video signal for detecting noise pulses therein which extendbeyond a selected video noise threshold and for generating a controlsignal upon the occurrence of each such detection; first noisecancelling means receiving the control signal and the composite videosignal for inserting into the video signal in response to the controlsignal a selected voltage level corresponding to a gray level during thereceiver's active scan time and a different selected voltage levelduring the receiver's blanking interval so as to replace impulse noisewith the selected voltage levels and thereby generate a noise-processedvideo signal for application to the video processing path; a secondimpulse detector receiving the composite video signal for detectingnoise pulses therein extending beyond a selected sync noise thresholdand for generating a detection pulse representative of each detectednoise impulse; and second noise cancelling means receiving the compositevideo signal and the detection pulses for substantially cancelling fromthe video signal noise pulses which are substantially time coincidentwith the detection pulses to thereby develop another noise-processedvideo signal for application to the sync processing path.
 2. A noiseprocessing system as set forth in claim 1 wherein said different voltagelevel corresponds to the blank level.
 3. A noise processing system asset forth in claim 1 wherein said first noise cancelling meansincludes:first switch means receiving a gray level signal and adifferent level signal, responsive to the receiver being in a blankinginterval for outputting the different level signal, and responsive tothe receiver being in a non-blanking interval for outputting the graylevel signal; and second switch means receiving the composite videosignal and the output of said first switch means, and being responsiveto said control signal for replacing noise pulses in the composite videosignal with the output of said first switch means.
 4. A noise processingsystem as set forth in claim 3 wherein said different level signalcorresponds to the blank level.
 5. A noise processing system as setforth in claim 1 wherein the composite video signal includes sync tips,wherein the video noise threshold is selected to be more black than thesync tip level, and wherein the sync noise threshold is selected to besubstantially more black than the video noise threshold.
 6. A noiseprocessor as set forth in claim 1 wherein said second noise cancellingmeans includes:a pulse reversing circuit adapted to receive and invertthe detection pulses; an amplifier receiving the composite video signalfor amplifying and integrating the latter signal, and receiving theinverted detection pulses for combining them with the amplified andintegrated composite video signal so as to cancel noise pulses in thecomposite video signal; and means sensing the amplitude of saiddetection pulses and coupled to said pulse reversing circuit in afeedback arrangement so as to limit the amplitude of the detectionpulses to a reference level so as to enable the pulse reversing circuitto quickly recover from its response to a received detection pulse. 7.In a television receiver which detects a composite video signal having ablank level and a gray level, and which includes a path for processingsync information derived from the composite video signal and anotherpath for processing video information derived from the composite videosignal, a noise processing system for reducing impulse noise in the syncprocessing path and in the video processing path, comprising:a firstimpulse detector receiving the composite video signal for detectingnoise pulses which extend beyond a selected video noise threshold andfor generating a control signal upon the occurrence of each suchdetection; first switch means receiving a gray level signal and a blanklevel signal, responsive to the receiver being in a blanking intervalfor outputting the blank level signal, and responsive to the receiverbeing in a non-blanking interval for outputting the gray level signal;second switch means receiving the composite video signal and the outputof said first switch means, and being responsive to said control signalfor replacing noise pulses in the composite video signal with the outputof said first switch means, thereby generating a noise-processed videosignal for application to the video processing path; and means receivingthe composite video signal for eliminating therefrom noise pulses whichexceed a selected sync noise threshold so as to generate anothernoise-processed video signal for application to the sync processingpath.
 8. In a television receiver which detects a composite video signalhaving a blank level and a gray level and which includes a path forprocessing video information derived from the composite video signal, anoise processing system for reducing impulse noise in the videoprocessing path, comprising:an impulse detector receiving the compositevideo signal for detecting noise pulses therein which extend beyond aselected video noise threshold and for generating a control signal uponthe occurrence of each such detection; and noise cancelling meansreceiving the control signal and the composite video signal forinserting into the video signal in response to the control signal aselected voltage level corresponding to a gray level during thereceiver's active scan time and a different selected voltage during thereceiver's blanking interval so as to replace impulse noise with theselected voltage levels and thereby generate a noise-processed videosignal for application to the video processing path.
 9. A noiseprocessing system as set forth in claim 8 wherein said different voltagelevel corresponds to the blank level.
 10. In a television receiver whichdetects a composite video signal having a blank level and a gray level,and which includes a path for processing video information derived fromthe composite video signal, a noise processing system for reducingimpulse noise in the video processing path, comprising:an impulsedetector receiving the composite video signal for detecting noise pulseswhich extend beyond a selected video noise threshold and for generatinga control signal upon the occurrence of each such detection; firstswitch means receiving a gray level signal and a blank level signal,responsive to the receiver being in a blanking interval for outputtingthe blank level signal, and responsive to the receiver being in anon-blanking interval for outputting the gray level signal; and secondswitch means receiving the composite video signal and the output of saidfirst switch means, and being responsive to said control signal forreplacing noise pulses in the composite video signal with the output ofsaid first switch means, thereby generating a noise-processed videosignal for application to the video processing path.